Inside the Intel 8087: how floating-point addition and subtraction actually worked

A close look at the 8087's arithmetic engine

A detailed teardown published on righto.com, currently surfacing on Hacker News's front page, examines how Intel's 8087 math coprocessor performed floating-point addition and subtraction at the level of microcode and individual circuits. To map the chip's internals, the author pried the lid off a package with a chisel and photographed the die under a microscope, producing images sharp enough to pick out individual functional blocks.

Introduced in 1980, the 8087 accelerated math for the IBM PC and other 8086-based systems. According to the write-up, it ran additions almost 100 times faster than the host processor, with even larger gains for more complicated operations. The chip could also compute tangents, square roots and logarithms, but the article narrows its focus to the two most fundamental operations.

The blocks on the die

Two regions dominate. A microcode ROM in the middle of the die stores the 1,648 micro-instructions that sequence the chip, while the bottom half is the datapath, the circuitry that computes on 80-bit values.

The core of the datapath is an integer adder. It draws one operand from the B register and the other from either the stack registers or the temporary registers, depositing its output in a sum register. A shifter, physically large because it can move a value by an arbitrary number of bit positions in one operation, performs the alignment and normalization shifts that floating-point math requires, helped by circuitry that counts leading zero bits so they can be shifted away. A separate exponent converter adjusts exponents while flagging overflows and underflows.

Why floats need more than an adder

As the article explains, integers cover only a limited range, roughly negative to positive two billion at 32 bits, and cannot express fractions at all. Floating-point solves both problems with a sign, a significand of the form 1.bbb..., and a power-of-two exponent; even the 32-bit short format spans from below 10^-36 to beyond 10^38.

Before two values can be combined, their binary points must be aligned, much as decimal points are lined up in pencil-and-paper arithmetic. In the article's 13.5 + 3.5 example, the smaller operand shifts two places right so the exponents match, an ordinary integer addition then combines the significands, and the extra carry bit that emerges is resolved by shifting the result right one place while incrementing the exponent.

Subtraction shares the alignment step but adds complications. The result can be positive, negative or exactly zero, and it can be orders of magnitude smaller than either input, so normalization may demand a large leftward shift. For 8 minus 7.5, the result shifts left four bits and the exponent drops by four. A negative result gets its significand made positive and its sign flipped, while a zero result skips normalization entirely and returns a signed +0 or -0.

Registers, tags and rounding bits

Everything inside the 8087 lives in an 80-bit format known as temporary real: one sign bit, a 15-bit exponent and a 64-bit significand. The exponent is stored with a bias of 16,383 so the stored field stays positive, and its width reaches values beyond 10^4932.

The chip exposes eight registers arranged as a stack, each carrying a tag of zero, valid, special or empty. Special covers infinities, NaNs and denormalized values, and the empty tag lets the hardware detect stack overflow and underflow. Two internal registers, tmpA and tmpB, mirror the 80-bit layout with tag bits of their own, while tmpC holds only a 68-bit significand: one extra bit absorbs overflow and three low-order guard, round and sticky bits serve rounding.

At the heart of the machine sits a 69-bit integer adder, wider than 64 bits precisely to accommodate the rounding bits plus extra high-order bits. Even a single integer addition consumes two micro-instructions, the first of which selects an operand and options such as carry handling and rounding behavior. Micro-instructions themselves are 16 bits wide and cover data movement, conditional jumps, and subroutine calls and returns.

Why it matters

None of this is museum-piece trivia. Exponent alignment, post-operation normalization, signed zeros, and guard, round and sticky bits remain the standard machinery of floating-point hardware today, and the edge cases the 8087's microcode had to special-case, such as cancellation in subtraction and results far smaller than the operands, are the same ones that still surprise developers writing numerical software. Watching the operation reduced to shifts, integer additions and exponent bookkeeping is one of the clearest ways to grasp what a processor genuinely does with fractional numbers.